.MODEL modelname modeltype ( param1=val1 [ param2=val2 ]... )
.MODEL modelname ako:inherited_name modeltype ( param1=val1 [ param2=val2 ]... )

This statement specifies a set of model parameters that are used by one or more devices. .model statements often reside in model libraries.

modelname Model name. Any text string to uniquely identify model. Must begin with a letter but may contain any legal ASCII character other than a space and period '.'
modeltype Model type. See tables below for possible values
param1, param2 etc. Parameter name. Valid values depend on the model type. (See Simulator Devices)
inherited_name Model inherits parameters from inherited_name. Any further parameters override the inherited model. Note that modeltype must be the same as the inherited model
val1, val2 etc. Parameter value

In this topic:

XSPICE Model Types

Model name Description
ad_converter analog-to-digital converter
adc_bridge analog-to-digital interface bridge
adc_schmitt analog-to-digital schmitt trigger
cm_cap Capacitor with voltage initial condition
cm_ind Inductor with current initial condition
d_and digital n-input and gate
d_buffer digital one-bit-wide buffer
d_cap Digital capacitor
d_dff digital d-type flip flop
d_dlatch digital d-type latch
d_fdiv digital frequency divider
d_init Digital initial condition
d_inverter digital one-bit-wide inverter
d_jkff digital jk-type flip flop
d_logic_block arbitrary logic block
d_nand digital n-input nand gate
d_nor digital n-input nor gate
d_open_c digital one-bit-wide open-collector buffer
d_open_e digital one-bit-wide open-emitter buffer
d_or digital n-input or gate
d_osc controlled digital oscillator
d_pulldown digital pulldown resistor
d_pullup digital pullup resistor
d_pulse digital pulse
d_ram digital random-access memory
d_res Digital resistor
d_source digital signal source
d_srff digital set-reset flip flop
d_srlatch digital sr-type latch
d_state digital state machine
d_tff digital toggle flip flop
d_tristate digital one-bit-wide tristate buffer
d_xnor digital n-input xnor gate
d_xor digital n-input xor gate
da_converter digital-to-analog converter
dac_bridge digital-to-analog interface bridge
s_xfer s-domain transfer function block

SPICE Model Types

Model name Description
ACTABLE AC Table Lookup (including S-Parameters)
C, CAP Capacitor
CORE Inductor (Saturable)
CORENH Inductor (Saturable)
D Diode - Level 1 and Level 3
HICUM_211 Bipolar Junction Transistor (HICUM)
LPNP Lateral PNP Bipolar Junction Transistor (SPICE Gummel Poon)
LTRA Lossy Transmission Line
NIGBT Insulated Gate Bipolar Transistor
NJF N-channel Junction FET

Also many other types. See table of contents
NPN NPN Bipolar Junction Transistor (SPICE Gummel Poon)

Also VBIC, Mextram and Hicum devices
PJF P-channel Junction FET

Also many other types. See table of contents
PNP PNP Bipolar Junction Transistor (SPICE Gummel Poon)
R, RES Resistor
R3_CMC CMC Resistor
SRDIO Diode - Soft Recovery
SW, VSWITCH Voltage Controlled Switch
VSXA Verilog-HDL Interface (VSXA)

Safe Operating Area (SOA) Limits

It is possible to define SOA limits within the .MODEL statement. To do this, add one or more parameters in the following format:

LIMIT(name)=(min, max, xwindow)
name Name of quantity to test. See format for access variables useable when MODEL is specified for a .SETSOA statement. This is described in .SETSOA. E.g. use 'LIMIT(vcb)' to specify the limits for the collector-base voltage of a BJT.
min, max As described in .SETSOA.
xwindow As described in .SETSOA.


The following is a model for a 1N5404 diode.

.MODEL D1n5404 D(Is=15.48f Rs=7.932m Ikf=0 N=1 Xti=3
+      Eg=1.11 Cjo=150p M=.3 Vj=.75 Fc=.5
+      Isr=120n Nr=2 Bv=525 Ibv=100u)