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» DVM Test Report: Ac Analysis|Bode Plot|Vin Maximum|50% Load
| Test Details | |
| Schematic | LTC3406B - DVM ADVANCED.sxsch |
| Test | Ac Analysis|Bode Plot|Vin Maximum|50% Load |
| Date / Time | 12/10/2015 5:41 PM |
| Report Directory | dc_dc_built_in\AcAnalysis\Bode Plot\Vin Maximum\50% Load |
| Log File | report.txt |
| Screenshot | schematic.png |
| Status | PASS |
| Simulator | simplis |
| Deck | input.deck |
| Init | input.deck.init |
| Measured Scalar Values | |
| Efficiency | 79.0058% |
| gain_crossover_freq | 23.3516k |
| gain_margin | 29.1503 |
| ILOAD1 | AVG 750.338m MIN 748.216m MAX 752.056m RMS 750.339m PK2PK 3.83952m |
| ISRC1 | AVG 260.034m MIN 465.747u MAX 1.0488 RMS 454.793m PK2PK 1.04833 |
| min_phase | 40.8556 |
| min_phase_freq | 23.3516k |
| phase_crossover_freq | 386.954k |
| phase_margin | 40.7985 |
| Power(LOAD1) | 1.12977 |
| Power(SRC1) | 1.42998 |
| sw_freq | 955.651k |
| VLOAD1 | AVG 1.50567 MIN 1.50142 MAX 1.50912 RMS 1.50568 PK2PK 7.7046m |
| VSRC1 | AVG 5.49974 MIN 5.49895 MAX 5.5 RMS 5.49974 PK2PK 1.04833m |
| Measured Spec Values | |
| Max_VLOAD1 | PASS: Max. Output1 Voltage (1.50912) is less than or equal to Max. Output1 Voltage Spec (1.58025) |
| Min_VLOAD1 | PASS: Min. Output1 Voltage (1.50142) is greater than or equal to Min. Output1 Voltage Spec (1.42975) |
| min_gain_margin | PASS: Gain Margin (29.1503) is greater than Min. Gain Margin (12) |
| min_phase_margin | PASS: Phase Margin (40.7985) is greater than Min. Phase Margin (35) |
 Bode Plot
GAIN
PHASE
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| SXGPH File | simplis_ac8_338.sxgph |
 LOAD1
VLOAD1
ILOAD1
|
|
| SXGPH File | simplis_pop8_324.sxgph |
 SRC1
VSRC1
ISRC1
|
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| SXGPH File | simplis_pop8_319.sxgph |
 default
FREQUENCY
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| SXGPH File | simplis_pop8_302.sxgph |
| Other SXGPH Files | |
| clock#pop | simplis_pop8_307.sxgph |
