| TITLE | SIMetrix/SIMPLIS DVM Tutorial |
| APPLIES TO | SIMetrix/SIMPLIS DVM v6.10 |
| KEYWORDS | dvm, tutorial, getting started, ltc3406b |
| DESCRIPTION | Tutorial for the SIMetrix/SIMPLIS Design Verification Module using the LTC3406B as an example. |
The SIMetrix/SIMPLIS Design Verification Module (DVM) provides the ability to run multiple user-defined simulation tests, aggregate the results and generate a simulation report, all without user intervention. DVM supports user-defined testplans allowing for the configuration of the simulation engine, analysis directives, temperature (where applicable), component values and test conditions. A properly configured schematic can also take advantage of DVM's new sensitivity and worst case analysis functions.
The SIMetrix/SIMPLIS DVM testplan allows a user to specify the following on a test by test basis:
.AC, .TRAN, .POP, .DC, etc...).VAR, .PARAM and .GLOBALVAR Statements for Circuit Parametrization
The following links may be useful for further reading during or after the tutorial.
This tutorial will use the LTC3406B Synchronous Rectified Buck schematic to demonstrate the features and operation of the SIMetrix/SIMPLIS Design Verification Module. This model was developed in-house solely from publicly available information found in the product's datasheet. The schematic can be found in the zip file distributed with this tutorial (download).
To start with, use SIMetrix/SIMPLIS DVM v6.1b or later to open the following schematic from the tutorial zip file.
LTC3406B/Test Ckts/LTC3406B - AC-Bode Plot.sxsch
The LTC3406B is a Sync Buck circuit and this schematic is configured to execute an Ac Analysis and generate a bode plot.
To prepare a schematic for DVM, place a Basic DVM Control symbol on the schematic.
After placing the symbol, double click on it to edit its values. At the minimum, you should set the value for "Circuit Name" and "Description".
Next, create a simple testplan file to use with the example circuit. To start with, use a header row with one analysis column to run the three basic tests, AC, Transient and POP. The testplan syntax documentation is available online and the example testplan below is included in the tutorial zip file.
support/testplan/basic.testplan
An easy way to grab the required analysis statements is to copy or cut the .AC, .TRAN and .POP directives from the F11 window.
Using the \n character sequence to indicate a line break allows for the inclusion of the .POP directive with the AC and Transient analyses. Should any analysis-specific .OPTIONS statements be required, use the same mechanism to include them.
| *** |
|---|
| *** basic.testplan |
| *** |
| *?@ analysis |
| .AC DEC 25 100 500k\n.POP TRIG_GATE={TRIG_GATE} TRIG_COND=0_TO_1 MAX_PERIOD=1u |
| .TRAN 500u 0\n.POP TRIG_GATE={TRIG_GATE} TRIG_COND=0_TO_1 MAX_PERIOD=1u |
| .POP TRIG_GATE={TRIG_GATE} TRIG_COND=0_TO_1 MAX_PERIOD=1u |
To run a testplan, select DVM > Run > Choose Testplan... from the menu.
The DVM Test Selection dialog allows the user to select any subset of tests to be run. The options that appear in the dialog are dependent on the label entry for that row in the testplan. Tests without a label are automatically, if not creatively named.
After selecting tests for execution, DVM automates the circuit and analysis configuration and then launches the simulation engine, SIMPLIS in this case. Once the simulations are completed, the user is presented with the DVM overview report. Navigate to the test report for Test 1.
By default, the test report does not contain much more than a few links to the saved results files. Any waveform whose name starts with "DVM" or "DVM " will be featured in the test report. To demonstrate a featured waveform, rename the existing VOUT fixed voltage probe to "DVM VOUT". For convenience, enable the "Use separate graph" option and assign the probe to the "OUTPUT" graph.
Add another fixed voltage probe (Place > Probe > Voltage Probe) to the positive terminal of V2. Name it "DVM VIN" and assign it to the "INPUT" graph.
A convenient way to rerun a subset of tests is DVM > Run > Run Last Selected Tests.
After the simulations complete, navigate again to the test report for Test 1. Notice that graphics and statistics have been created for the two featured waveforms VIN and VOUT.
At this point, the schematic is properly configured for basic DVM use. An already configured version of this schematic can be found in the tutorial zip file.
LTC3406B/Test Ckts/LTC3406B - DVM BASIC.sxsch
More complicated tests can be constructed using additional DVM symbols, the DVM Input Source and DVM Output Load.
Remove the DC voltage source V2 and replace it with a DVM Input Source (DVM > Place > Source > Input Source).
Now remove the resistor R1 and replace it with a 2-Terminal Output Load (DVM > Place > Load > 2-Terminal Output Load).
DVM Sources and Loads include voltage and current probes, so remove the existing DVM VIN and DVM VOUT voltage probes. The Source Name and Load Name properties determine the names of the built-in probes. Change the Load Name property of the DVM Load I1.
Change the Source Name property of the DVM Source V2.
To include the Bode Plot in the output report for the Ac Analysis, change the two curve labels to start with "DVM".
Now, add to the testplan. Use the same analysis column and the same three basic tests, but add additional columns to configure source, load and label. Again, the example testplan below is included in the tutorial zip file.
support/testplan/intermediate.testplan
| *** | |||
|---|---|---|---|
| *** intermediate.testplan | |||
| *** | |||
| *?@ analysis | source | load | label |
| .AC DEC 25 100 500k\n.POP TRIG_GATE={TRIG_GATE} TRIG_COND=0_TO_1 MAX_PERIOD=1u | DC(V2, 4.5) | RES(I1, 2.0066) | Ac Analysis|Vin 4.5V|Iout 750mA |
| .TRAN 500u 0\n.POP TRIG_GATE={TRIG_GATE} TRIG_COND=0_TO_1 MAX_PERIOD=1u | DC(V2, 5.5) | DC(I1, 500m) | Transient Analysis|Vin 5.5V|Iout 500mA |
| .POP TRIG_GATE={TRIG_GATE} TRIG_COND=0_TO_1 MAX_PERIOD=1u | DC(V2, 5) | RES(I1, 1.0033) | Steady-State Analysis|Vin 5V|Iout 1.5A |
The source and load columns allow specification of the subcircuit that will be used for their respective symbols for that simulation. For the first test, V2 is configured to be a 4.5V DC voltage source, I1 is configured as a 2.0066 Ohm resistive load. For the second test, V2 is configured to be a 5.5V DC voltage source, I1 is configured as a 500mA DC current source. For the final test, V2 is configured to be a 5V DC voltage source, I1 is configured as a 1.0033 Ohm resistive load. See the testplan syntax documentation for more details on the acceptable values for the usage with DVM sources and loads.
The label is a | separated string that determines how a test is named in the test report and how it appears in the test selection GUI. Tests are grouped together and sorted alphabetically by label in the test selection GUI, however the order of execution is determined by its position in the testplan file.
Note the order in the GUI...
...compared to the order in the overview report
Examining the test report for the Ac Analysis, note that the Bode Plot is now a featured set of waveforms (order of the graphics varies, it might be necessary to scroll down in the report to locate the image)
At this point, the schematic is properly configured for intermediate DVM use. An already configured version of this schematic can be found in the tutorial zip file.
LTC3406B/Test Ckts/LTC3406B - DVM INTERMEDIATE.sxsch
DVM ships with several built-in testplans, including one specifically tailored for the Synchronous Rectified Buck topology. The built-in DVM testplans all require the circuit to be setup for Full PowerAssist with managed sources and loads. Though not strictly necessary, the schematic looks much better when the Bode Plot probe and the AC voltage source are removed.
When using a 3- or 4- terminal DVM Output Load, the probe and AC source can be automatically inserted into the subcircuit definition. In most cases, it is better to use the 4-terminal load as it makes fewer assumptions about the circuit, however the LTC3406B example circuit works fine with the 3-terminal load.
Remove the existing DVM 2-Terminal Output Load, the Bode Plot probe, the AC source and the connectors used to measure the Bode Plot. Place a DVM 3-Terminal Output Load (DVM > Place > Load > 3-Terminal Output Load) and connect it to the appropriate node to break the loop.
Delete the existing DVM Basic Control and replace it with a new DVM Control that supports Full PowerAssist (DVM > Place > Control > Full PowerAssist).
To configure the DVM Control to manage the schematic's DVM sources and loads, right-click on the DVM Control and choose "Edit Additional Parameters".
Choose "Configure Sources and Loads" and hit OK.
Make certain the DVM Input Source (V2) is in the list of Managed Sources.
Make certain the DVM Output Load (I1) is in the list of Managed Loads.
The DVM Control should then configure itself as having one input and one output. The default values for many parameters can be used for this circuit, but some of the basic values must be customized for proper operation. Double click on the DVM Control and set the values for Circuit Name, Circuit Description and Switching Frequency under the General tab.
Under the Input tab, set the values for Nominal, Minimum and Maximum Input Voltage.
Under the Output tab, set the values for Nominal Output Voltage, Maximum Output Current as well as the values for Light Load @ Input1 Min and Max.
Under the Analysis tab, check the POP tab to be certain that the POP trigger information was correctly detected when the DVM Control was placed on the schematic.
Once the control is configured, the schematic is ready to be run through its paces. From the built-in testplans menu, select the Sync Buck testplan (DVM > Built-In Testplans > Sync Buck (1 Input, 1 Output)).
Select a few tests to run.
DVM will now run the tests, collect the results and compare the simulation data to the specifications entered in the DVM Control. If the same tests were selected as in the example, the overview report should show a test failure.
In this case, the test that failed was a light load test, and the test report shows that the simulated phase margin was insufficient compared to the specification.
At this point, the schematic is properly configured for DVM Full PowerAssist. An already configured version of this schematic can be found in the tutorial zip file.
LTC3406B/Test Ckts/LTC3406B - DVM ADVANCED.sxsch
SIMetrix/SIMPLIS ships with a powerful scripting language (script documentation). DVM allows for users to specify pre- and post-processing scripts to be run with a test. Pre- and post-processing scripts can be assigned either in a testplan (testplan syntax documentation) or through the DVM Control (supported by both the Basic and Full PowerAssist symbols). Pre- and post-process scripts are launched with the /quiet and /noerr flags to prevent script errors from halting DVM execution.
Pre-process scripts are executed immediately before the simulation is launched. If multiple scripts are assigned, the order of their execution is as follows:
Arguments definition.
Arguments @retval label report_dir log_file controlhandle
retval is the return value for the script. The return value is logged in the test log file.
label is the label of the currently executing test.
report_dir is the base directory for simulation results.
log_file is the location of the overview log.
controlhandle is the value of the Handle property for the DVM Control Symbol on the top level schematic.
Post-process scripts are executed after the simulation is completed and before any waveform processing is done. If multiple scripts are assigned, the order of their execution is as follows:
Arguments definition.
Arguments @retval label report_dir log_file controlhandle
retval is the return value for the script. The return value is a string vector containing the user-defined spec and scalar values generated by the post-process script.
label is the label of the currently executing test.
report_dir is the base directory for simulation results.
log_file is the location of the overview log.
controlhandle is the value of the Handle property for the DVM Control Symbol on the top level schematic.
The format for the retval string vector to return user-defined scalar and spec values is as follows:
[ 'scalar1=value1~scalar2=value2', 'spec1=status,value1~spec2=status,value2' ]
For spec values, status should be either pass, warn or fail.
A simple example that shows two scalar values and a single spec:
Arguments @retval label report_dir log_file controlhandle
Let retval = [ 'v1_min=1~v1_max=2', 'v1_check=pass,v1_min was less than or equal to v1_max' ]
The resulting test report should look something like the following: